[1]
Takayashiki, H., Sato, M., Komatsu, K. and Kobayashi, H. 2019. A Skewed Multi-banked Cache for Many-core Vector Processors. Supercomputing Frontiers and Innovations. 6, 3 (Sep. 2019), 86–101. DOI:https://doi.org/10.14529/jsfi190305.